1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more specifically, relates to a semiconductor device including a high permittivity gate dielectric film and a metal gate electrode (especially a metal oxide semiconductor field transistor (MOSFET)) and a method of manufacturing the same.
2. Description of the Related Art
In development of advanced complementary metal-oxide semiconductor (CMOS) devices with transistors increasingly miniaturized, there arise problems of degradation of driving current due to depletion of the poly-silicon (poly-Si) electrode and increase in gate current due to thinning of the gate dielectric film. Accordingly, consideration has been made on composite techniques to avoid the depletion of electrodes by applying metal gates and to reduce the gate leakage current by making the gate dielectric film of a high dielectric material to increase the physical thickness thereof. As the material of the metal gate electrode, pure metal, metallic nitride, silicide material, and the like are under consideration. However, in the case of any of such materials, threshold voltages (Vth) of N-type and P-type MOSFETs need to be settable to appropriate values. In the case of using a conventional gate electrode provided on a polycrystalline silicon film, the threshold voltage of the transistor is determined by the impurity concentration of the channel region and the impurity concentration of the polycrystalline silicon film. On the other hand, in the case of using a metal gate electrode, the threshold voltage of the transistor is determined by the impurity concentration of the channel region and the work function of the gate electrode. In order to manufacture a CMOS transistor having a Vth within +/−0.5 V, the gate electrode of the n-type MOSFET needs to be made of a material having a work function of not more than the midgap of Si (4.6 eV) and desirably not more than 4.4 eV. The gate electrode of the p-type MOSFET needs to be made of a material having a work function of not less than the midgap of Si (4.6 eV) and desirably not less than 4.8 eV.
As a means for implementing the aforementioned conditions, studies are currently made on a metal-inserted poly-silicon stack (MIPS) which is highly compatible with the existing CMOS manufacturing process. In this method, a gate electrode including a metal film between poly-Si and a gate insulating film is formed, and the threshold voltage is adjusted by the work function of the gate electrode. In this regard, the work function of the metal film changes depending on interaction between the metal film and the gate insulating film or poly-Si during a heat treatment process.
Japanese Patent Laid-open Publication No. 2008-16538 discloses a method of using a gate electrode including a stack of poly-crystalline silicon, PVD-TiN (a second metal layer), and CVD-TiN (a first metal layer). TiN film formed by conventional sputtering has a work function of only about 4.6 eV. However, in the description of Japanese Patent Laid-open Publication No. 2008-16538, the work function of TiN as the first metal layer directly formed on the gate insulating film can be not less than 4.8 eV, which is suitable for the metal gate of the p-type MOSFET, in such a way that TiN is formed by thermal CVD using TiCl4 and NH3 at a low temperature of not more than 450° C. Moreover, TiN as the second metal layer is formed by PVD at 500° C. (higher than the temperature at which TiN as the first metal layer is formed). The formed TiN is (100) oriented. According to Japanese Patent Laid-open Publication No. 2008-16538, this (100) oriented TiN has an effect in suppressing reduction of the work function due to diffusion of Si from Poly-Si into TiN in a thermal process (e.g. activation annealing) after the gate electrode is formed.
Japanese Patent Laid-open Publication No. 2007-173796 discloses a method of forming a metal oxynitride (TiON, for example) on a high dielectric constant film by sputtering. First, a metal (M) target and an atmosphere containing Ar, N2, and oxygen are prepared. The metal target in the atmosphere is sputtered to form the metal oxynitride (TiON, for example). In Japanese Patent Laid-open Publication No. 2007-173796, the thus-formed stack of the high dielectric constant film and the metal oxynitride is used as the metal gate electrode. According to Japanese Patent Laid-open Publication No. 2007-173796, this method can produce TiN having a work function of not less than 4.8 eV, which is suitable for the metal gate of the p-type MPSFET.
However, the aforementioned techniques include the following issues.
The method described in Japanese Patent Laid-open Publication No. 2008-16538 is a technique effective in producing TiN having a high work function and suppressing reduction of the work function due to diffusion of Si from Poly-Si into TiN in a thermal process after the gate electrode is formed. However, TiN as the second metal layer, which is different from the first metal layer capable of reducing diffusion of Si, is separately formed by PVD after TiN as the first metal layer having a high work function is formed by CVD. Accordingly, the number of processes to manufacture the gate electrode is increased.
In the method described in Japanese Patent Laid-open Publication No. 2007-173796, the metal target is sputtered in the atmosphere containing Ar, N2, and oxygen to form the metal oxynitride (TiON, for example) on the high dielectric constant film. Accordingly, oxygen exists uniformly in the metal oxynitride layer. After high temperature heat treatment for the stack of the high dielectric constant film and the metal oxynitride, oxygen diffuses from the metal oxynitride into the high dielectric constant film which is the underlying base for the metal oxynitride, thus increasing the EOT.